This invention relates to a method for forming solder bumps on an electronic component of the type useful for attaching the component to an electronic package. More particularly, this invention relates to such method utilizing a transfer plate having solder nonwettable ceramic electrodes onto which solder deposits are electroplated for reflow onto the component.
In the manufacture of an electronic component package, it is known to mount a first component, such as an integrated circuit semiconductor chip, to a second component, such as a chip carrier or a printed circuit board, by a plurality of solder bump interconnections. Each interconnection extends between a terminal pad on the first component and a terminal pad on the second component to physically attach the components and to electrically connect the terminal pads for conducting electrical signals therebetween for processing. Typically, the interconnections are formed by bonding solder bumps to each pad of the first component, assembling the components so that each bump rests on a corresponding pad on the second component, and heating and cooling the assembly to reflow the solder and complete the interconnection.
Solder bumps may be formed from preformed solder balls either individually placed on each pad or distributed using a stencil. Missing or misplaced balls create open circuits that result in a defective package. Such defects may not be discoverable until after the package is completed. Because of the large number of balls and the small size of the target pads, individual placement with the required accuracy tends to be time-consuming and tedious. On the other hand, failure to fill even a single hole of a stencil produces an open connection, which task is rendered more difficult by the pinprick size of the holes. Alternately, solder bumps may be formed directly on a component by vapor deposition or electroplating. In particular, for electroplating, several steps are needed to prepare the surface and to either prevent plating on unwanted regions or remove excess plate therefrom. Such techniques are not well suited for printed circuit boards wherein the component attachment region constitutes a relatively small portion of the entire surface area. Furthermore, poor plating at an individual pad for any reason may produce an undersized deposit that is difficult to detect, but fails to produce the desired interconnection. Thus, while electroplating has advantages in forming the solder bumps, plating directly onto a component jeopardizes the component, which is particularly significant because of the substantial cost to manufacture the component.